utilisation de la plateforme virtuelle qemu/systemc pour l'iot
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Enabling System Level Design 1
GreenSocs OverviewGreenSocs Virtual Platforms let you imagine, design, develop and test your embedded application as a whole; size your hardware to reflect the needs of your software; build your software and hardware together; debug your software and verify your hardware efficiently.
Enabling System Level Design 2
GreenSocs: Integrated Virtual Platforms
• GreenSocs® is the industrial leader in integrating different Virtual Platform solutions
• Dr Mark Burton is the founder of GreenSocs. Mark has worked for ARM managing their modeling group. He was the chair of the OSCI TLM WG and the OCP-IP SLD WG.
• GreenSocs provided technology behind the TLM-2.0 standard, and the CCI standard. We continue to be at the heart of SystemC development.
• GreenSocs is a contributor to QEMU, providing technology to support multi-thread and reverse execution.
• GreenSocs has been in business (incorporated in UK and France), and profitable, since 2005, including within its client base large multi-nationals.
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THE PROBLEMEntrée
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IoT : Lots of small devices
• The problem is not building small devices, we know how to do that
• The problem is Connecting, Deploying, Securing them
• Connecting:• The problem of design is no longer limited to the individual device.
• Deploying:• Time to market is critical, especially in new emerging IoT devices,
re-spins and prototype development delays adoption and deployment.
• Securing:• Testing devices is not just about functionality, but security and
conformance.
Enabling System Level Design 5
No longer can we simply test the device, we must test the devices impact on the network and other devices.
We must consider the complexities of big data.
The Problem of Testing
• Testing IoT is a major issue:• 26 Billion IoT units by 2020
(Gartner)• Enormous data throughput• An individual working device is not
enough!
Enabling System Level Design 6
Testing IoT
• Connectivity• Combined software and hardware that enables
connectivity
• Security• Security of the device, of the network, and of
the data
• Interactivity• How devices communicate with other devices
• Scalability• How will scaling effect the network.
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Building a Prototype… The Costs
Building a prototype takes time
Sourcing the parts is expensiveAnd time-consuming…
The result is fragile andexpensive
AND YOU ONLY HAVE ONE
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THE SOLUTIONPlat principal
Enabling System Level Design 9
Radio
GreenSocs Virtual Prototypes : The FOSS Solution
• Enable Full Virtual Testing • Unlimited number of devices• Full interconnectivity modeled• Complete production software
and hardware stack.
• Simple to deploy, low investment
• Enable H/W and S/W development from the start of the project.
• Unlimited number of nodes: Open Source (no license costs for wide-scale deployment)
• Based on Standards : Full interoperability
What’s inside “a” virtual platform
Radio
Network
Enabling System Level Design 10
GreenSocs Solution: Bring together projects
IP Generation Toolse.g. Verilog to SystemCVerilator
Debug EnvironmentsIncluding eclipse.
Core IP modelsSystemC modeling and
integration libraries
Profiling and Code
Coverage
kcachegrindlcov
Enabling System Level Design 11
Open Source SystemC Standard
SystemC TLM-2.0 IEEE 1666 is :The Virtual Platform Standard
• Open Source Simulator available for download from Accellera.org
Corporate members 2016
• GreenSocs technology at the heart of TLM-2.0 standard.• All GreenSocs interfaces use TLM-2.0
• GreenSocs helping Accellera forge a new Model to tool standard.
• Preview available in GreenConfig.
• Our solutions are tool independent, and work with all vendors.
Enabling System Level Design 12
Based on Existing and stable technology
IoT Aerospace Automotive Health Mobile Embedded
• Virtual Platforms used in many sectors: boost time to market
• Highly suited to IoT:• Low cost of adoption• Time to market is critical• Networking complexity increasing
• Specific demands of IoT sector:• Models of environmental factors,• Models of connectivity networks.
Enabling System Level Design 13
QEMU : Our Preferred source of CPU models
• QEMU is the defacto standard Virtualizer.• Free and Open Source.• It is over 10 years old
• GreenSocs is a key contributor: Reverse execution and Multi-Core TCG Kernel.
• Regular committers from many organizations
43000 1000 989,863Commits Contributors Lines of code
…
Enabling System Level Design 14
THE ADVANTAGESDessert
Enabling System Level Design 15
Virtual Platforms drive your business
Research
Realize
Revenue
Reuse
Image your ideasrealized…
Models enable: Parallel development Team communication Faster debug Quicker bring up Better test.
Models enable customer
interactions, during sales, and for better
support.
Models are the basis of re-use
decisions.
Size your H/W for your S/W
Verify virtually, before it impacts revenue!
Enabling System Level Design 16
hardware developmentsoftware developmentIntegration Validation and test
Virtual Platforms reduce Time and Risk.
Effor
t
Limited CriticalIntegration
points
ContinualIntegration
Reduce Risk
Models become a critical tool for S/W teams to do their job
right
Save TimeImprove quality
Effor
t
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Classic V Design Flow
✔
Verification
And
Test
Specification
H/W Design
S/W Design
Integration
Add a Virtual Platform
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Accelerate V Design Flow
✔
Verification
And
Test
Specification
H/W DesignS/W Design
Integration
HW and SW developed together.
Early verification and test
Reduce RiskReduce Time
Leap straight to Verification
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IoT: the network, and real world conditions.
Develop Devices and Applicationswith production tool chain, test with real
world conditions with no physical constraints
Across the full network of many devices
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Importance of Open Source
Software development costs are rocketing.
We need more and more engineers…
Those engineers need more and more tools.
Open Source, Pay for the development, not the
deployment
Provide ALL your software engineers with the same model with no license cost!Keep the model source Free Forever
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Importance of Standards
Your product
Is their component
Her tool choice
Must not force your choice!
Models must be tool independentThey must use the Standard interfaces
Hence SystemC TLM-2.0
Is not his choice
Enabling System Level Design 22
GreenSocs : principle offers
CONSULTANCY AND SERVICESThe Experts in Virtual platforms:
Creation, deployment, integrationTool independent – vendor neutral.
Allow us to guide you to success
MODEL DEVELOPMENTVirtual Platforms based integrated development environments, for CoTs or specialist devices,ready for your software engineers to be productive.
All models adhere to STANDARDSAll model source provided.
OPEN SOURCE DEVELOPMENTAdding to the existing open source tools and models.
‘Upstreaming’ and dissemination
Enabling System Level Design 24
GreenSocs Technology
Enabling System Level Design 25
Virtualization
Emulation
Virtual PlatformVirtualization
(Para-)Virtualization
Hardware
Algorithm executionOr full system virtualization
Application
O/SVirtual platform
(model)
‘realbinary’
Full binary executionon virtual
platform (model)
Application
O/S
FPGA
Full binary executionon REAL
platform (FPGA)
Application
O/S
Hardware
Full binary executionon
Final Hardware
Enabling System Level Design 26
Open source simulator,or SystemC standard Vendor tool
Processors Communication Devices
Command and controlBack-end
Device Drivers
O/S
Application Stack
Model Based Virtual Platform Architecture
ComponentLibrary
library
Or Client Library
Virtual Platform ModelInteroperability Layer
Enabling System Level Design 27
Technology Expertise
• SystemC : IEEE 1666 The Virtual Platform Standard• Used for System Level Design and Construction
• GreenSocs has donated major parts of the SystemC standard (TLM2.0, CCI…)• GreenSocs has a large infrastructure library to assist in writing models.
• QEMU• Used for ‘Programmer’s View (LT)’ models
• Contributions:• VirtIO support• Reverse Execution• SystemC integration
• GEM5• Used for ‘Architectural analysis (AT)’ models
• Contributions:• SystemC integration
Enabling System Level Design 28
GreenSocs SystemC Infrastructure.
• Model Construction• Eases building register definitions, state machines etc• Scripting (Python)
• Model to Model communication• Busses and routers (e.g. AMBA, PCIe, OCP, etc)• Signals (interrupts etc)• Serial, Ethernet, Graphics etc….
• Model to Tool communication• Configuration, (inc Lua)• Control (Run time re-configuration)• Inspection (outputs and tracing).
• Model IP• Routers,• simple IP blocks,• libraries (Graphics, communication)
• Tools• Integration with Qemu, GEM5, Eclipse and other tools.
Tool Vendor IndependentO
PEN SO
URCE
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QEMU
• QEMU is a virtualization engine• It uses Dynamic translation to be very very fast.• We recommend that QEMU is used for software development,
test and debug.
• QEMU is extremely well known and very solid and reliable.• QEMU is under extremely active development supported by a
large community
• QEMU covers a vast range of CPU’s and Platforms
Enabling System Level Design 30
Qemu and SystemC
• SystemC is used to model h/w components in a ‘standard’ way.
• SystemC models can be used in a variety of EDA tool environments.
• Combining Qemu and SystemC gives the ability to use the power of Qemu’s CPU simulation environment along with the standard approach to adding devices.
Processors Communication Devices
Command and controlBack-end
Enabling System Level Design 31
QBox
• Wraps up QEMU in a TLM2-0 API such that it can be used in standard SystemC
• QEMU is a generic and open source virtualizer – it covers almost all CPU architectures and achieves extremely high performance.
SystemC
QBox(qemu)
TLM
QBox
Enabling System Level Design 32
QBox features
• QBox is multi-threaded – the QEMU CPU executes in it’s own thread.
• SystemC code is always executed in it’s own thread to preserve the integrity of SystemC code.• (legacy code can be optimized to prevent too many context switches)
• QEMU and SystemC are synchronized on ‘quantums’ (as defined by TLM 2.0).
• Interrupts are handled asynchronously by QEMU.
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Extending Qemu for EDA virtulization
• MULTI Thread Qemu • A massive speed improvement for Qemu to take
advantage of multi-core hosts
• SystemC integration• The ability to mix SystemC models with Qemu.
• Reverse Execution• The ability to find a bug, and step backwards (in time)
to find the source of the bug.• GreenSocs has a fast implementation which is
compatible with SystemC.
Processors Communication Devices
Command and controlBack-end
Enabling System Level Design 34
Gem5
• Gem5 is a cycle approximate simulator.• It is at least 10x slower than QEMU• It can be very accurate.• Companies such as ARM use Gem5 to
explore CPU architecture.• Some models are available publically
• Gem5 can be very useful as the CPU model within a SystemC simulation environment.
Enabling System Level Design 35
Existing Model database overview:
X86 ARM MIPS Alpha PowerPC SPARC Micro-blaze
Cold-fire
Cris SH4 Xtensa
FastSW dev model(LT)
✔ ✔ ✔ ✔ ✔ ✔ ✔ ✔✔ ✔
Cycle AccurateHW devmodel(AT)
✔ ✔ ✔ ✔
CPU Family coverage:
Full list (of several hundred) available on GreenSocs.com
Enabling System Level Design 36
GreenSocs Summary
GreenSocsModelling Services
• GreenSocs specialises in understanding the problems of modelling, and providing tailored appropriate solutions
GreenSocsOpen Source Infrastructure
• Infrastructure freely provided• keep your code
Tool Independent.• Maximise productivity,
interoperability and re-use.• Cost effective infrastructure
development and maintenance.