croissance des semi-conducteurs à base d’arséniures sur ...3applied materials, 3050 bowers...
TRANSCRIPT
T. Baron1, M. Martin1, J. Moeyaert1, S. David1, S. Arnaud1, N. Rochat2, N. Bernier2, Y. Bogumilowicz2, A. Grenier 2, W. Hourani 2, E.
Martinez 2, E. Sanchez3, X. Bao3, S. Chen4, M. Liao4, M. Tang4, J. Wue4 , F. Bassani1
PhD students : R. Cipro, V. Gorbenko, R. Alcotte, ML. Touraton
1 LTM/CNRS-CEA-LETI, 17, rue des martyrs, 38054 Grenoble, France2CEA, LETI, Minatec Campus, 17, Avenue des Martyrs, 38054 Grenoble C, France
3Applied Materials, 3050 Bowers Avenue, Santa Clara, CA 95054, USA4University College London, London
Croissance des semi-conducteurs à base d’arséniures sur substrats Si(100) 300mm pour
réalisation d’émetteurs intégrés
III-V applications
No laser source directly grown on 300 mm Si substrates
Demonstrate the feasability to grow a CW laser @ 1.3 µm
on standard microelectronics Si substrates based on GaAs 2
Challenges for GaAs growth on Si
S. Lourdudoss, Current Opinion in Solid State and
Materials Science, vol. 16, no. 2, pp. 91–99, apr 2012.
Polarity, antiphase domains due to
stacking sequence Si–(As–Ga)n
Lattice mismatch:
GaAs-Si 4%
GaSb/Si 12%
Thermal expansion
coefficient:
2.3 × 10−6𝐾−1 for
GaAs vs
6.6 × 10−6𝐾−1 for
Si
543210
5
4
3
2
1
0
X[µm]
Y[µ
m]
20.00 nm
0.00 nm
1µm
Anti-Phase Boundaries
Cracks
Threading dislocationsW-Y Uen, Semicond. Sci. Technol. 21 (2006) 852–856
Differents routes to tackle these hurdles
Technological solutions
III-V epitaxy with buffer engineering
Using lateral overepitaxy
J.Z. Li et al., APL 91, 021114, 2007
S. Chen et al., NATURE PHOTONICS, VOL 10, MAY 2016
Aspect ratio trapping
J.Z. Li et al., APL 91, 021114, 2007
L. Czornomaz et al., 2015 Symposium on VLSI Technology
Digest of Technical Papers, T172
+ InAs QDs
Outline
Selective growth and aspect ratio trapping, InGaAs QW
2D GaAs buffer engineering
InAs QDs laser
300 mm MOCVD cluster tool
Applied Materials cluster tool
with in-situ cleaning chamber
Optoelectronics : PhD O.
Abouzaid, ML. Touraton
(IRT)
SiCoNi
Growth
chamber
Carrier
for transfer under
vaccum
Metal organic precursors:
Groupe III : TMGa, TMAl, TMIn
Groupe V : TBAs, TBP, TESb
Dopant : DEZn (type p)
Si2H6 and SiH4 (type n)
GaAs, Aspect Ratio Trapping
7
Annihilation of anti-phase boundaries, emerging dislocations
density reduction, stacking fault
SiO
2
GaAs
Si
GaAs selective epitaxial growth in SiO2 patterns (STEM cross
sectional views)
Good homogeneity
Substrate
50 nm
InGaAs QW
To measure the
material quality :
• Growth of
InGaAs/AlGaAs
quantum well in the
top region : optical
measurements
Si
R. Cipro et al., Applied Physics Letters 104(26):262103 · June 2014
8
InGaAs/AlAs QW
TEM structural analysis
HRSTEM-HAADFSpatial resolution: < 0.1 nm
APT reconstruction(10×10 ×16) nm3
InGaAs QWs grown inside SiO2 cavities with good interface
abruptness and cristalline quality
Optical measurements
Room temperature µPL signal with FWHM of 60 meV is seen on
pattern with dimension <200 nm
Non radiative recombination centers degrade the luminescence
l = 1.2 µm
0,9 1,0 1,1 1,2 1,3 1,4 1,5
0,00
0,25
0,50
0,75
1,00 In
7Ga
93As QW
In20
Ga80
As QW
In33
Ga67
As QW
In40
Ga60
As QW
No
rmalized
µP
L In
ten
sit
y (
a.u
)
Energy (eV)
µPL at room temperature Cathodolum. mapping at low
temperature (top view)
R. Cipro et al., Appl. Phys. Lett. 104, 262103 (2014)
9
1.05 eV = 1.18 µm 1.4eV =0.88 µm
0.95 eV = 1.3 µm
Outline
Selective growth and aspect ratio trapping, InGaAs QW
2D GaAs buffer engineering
InAs QDs laser
Si (100)
Nucleation layer
High temperature layer
APBs revelation at high
temperature
APBs random orientation
APBs nucleated at
Silicon single steps
SiO2 removed in Siconi chamber
Two steps growth mode
543210
5
4
3
2
1
0
X[µm]
Y[µ
m]
20.00 nm
0.00 nm
Roughness 2nm
1 µm
GaAs/Si (100)
Form double steps Si surface on Si(100)
From theory to experiments
Formation of Si(100) surface mainly double stepped with
some monoatomic islands for determined experimental
conditions
PH2, µH increase
Nucleation layer after ramp up
(110)-APBs
nucleates on monoatomic islands
GaAs growth on Si standard (100)
Nucleation
layer growth
After ramp
up
Surface mainly double stepped with
just a few monoatomic islands
HT growth
Nucleation layer
GaAs HT layer APBs kinking
and
self-annihilation
Free APB surface
<110>
<1-10>
400 nm
543210
5
4
3
2
1
0
X[µm]
Y[µ
m]
6.00 nm
0.00 nm
Roughness : 0,6 nm
1 µm
<110>
<1-10>
1 µm
Doubles steps + optimized growth process enable free
APBs GaAs growth on Si(100),
Stable, reliable, reproducible process
µ in GaAs x 10 (2000 cm2/V.s), IPL x 3
1.3 µm InAs QD laser on on-axis Si (001)
Coll. UCL London
14
CNRS/LTM
CEA/Leti
UCL
Optics Express 25, 4632 (2017)
GaAs and Si substrates comparison
Comparable morphological and optical properties of InAs
QDs grown on GaAs and Si substrates
A small RMS surface
roughness of 0.86 nm has
been achieved.
no obvious “V” –groove
feature can be observed.
Both dot density and PL
intensity is quite comparable
with, the reference QD
sample.
15
Optics Express 25, 4632 (2017)
Devices characterization
16
0 200 400 600 800 1000 1200 1400
0
10
20
30
40
50
Ou
tput
Po
wer
(mW
)
Current Density (A/cm2)
0
1
2
3
4
5
6
Vo
lta
ge
(V
)
Room temperature
CW
On-axis Si (001) substrate
CW
Jth = 425 A/cm2 (RT)
Pout =40 mW/facet at (RT)
λpeak = 1292 nm
T max = 36 oC (c.w.) 102 oC (pulsed)
S. Chen et al. Optics Express 25, 4632 (2017)
Conclusions
Room temperature PL from InGaAs QW selectively
grown in SiO2 cavities
GaAs 2D buffer developments
InAs QDs laser grown by MBE on GaAs layers/Si(100),
CW @ RT
Perspectives and route for III-V laser integration on
CMOS chips, optical interconnect, optical sensors,
imaging ...
Thank you for your attention !
MINOS Labex, RENATECH-RTB, Leti clean room,
FP 7 COMPOSE, ANR MOSINAS, IRT Nanoelectronic